1. Field of the Invention
The present invention relates to an electro-optical device (semiconductor device) including a circuit that is composed of a thin film transistor (hereinafter referred to as TFT) formed on an insulator, and to a method of manufacturing the same. Specifically, the present invention relates to an electro-optical device (semiconductor device) represented by a liquid crystal display device in which a pixel portion and a driving circuit provided in the periphery of the pixel portion are formed on the same substrate, and to an electronic appliance using the electro-optical device (semiconductor device) as a display unit.
2. Description of the Related Art
In recent years, a large number of TFTs have been developed which use as an active layer a polycrystalline semiconductor film obtained by crystallizing an amorphous semiconductor film that is formed on an insulating substrate such as a glass substrate. In particular, polysilicon films or other crystalline silicon films obtained by crystallizing an amorphous silicon film are often employed.
A process of forming a large-area polysilicon film on a substrate that has a low resistivity against heat, such as a glass substrate and a plastic substrate, is also a research and development theme that continues to attract researchers. Crystallization using laser light and crystallization involving doping with a crystallization-promoting catalytic element and heat treatment are given as examples of a so-called low temperature crystallization technique.
One of the latter crystallization techniques, in which an amorphous silicon film is doped with a catalytic element for promoting crystallization and then subjected to heat treatment to be crystallized, is disclosed in Japanese Patent Application Laid-open No. Hei 7-130652.
According to this technique, the temperature required to crystallize an amorphous silicon film can be lowered by 50 to 100xc2x0 C. and time required for crystallization is shortened to ⅕ to {fraction (1/10)} as well with the effect of a catalytic element. The technique thus makes it possible to form a crystalline silicon film having a large surface area on a substrate of low heat resistance as those mentioned above. Also, it is a confirmed fact that a crystalline silicon film obtained by this technique has an excellent crystallinity.
The above crystallization technique using a catalytic element employs a metal element such as Ni and Co for the catalytic element. These metal elements generate a great energy level in the silicon film to trap carriers and cause recombination of the carriers. Therefore, when the obtained crystalline silicon film is used to form a TFT, it is expected that the electric characteristic and the reliability of the TFT are affected.
In addition, the catalytic element remaining in the silicon film has been observed to segregate irregularly. The catalytic element segregates most in crystal grain boundaries, and it is considered that this segregation provides a leak path for a small amount of current and causes an abrupt increase in OFF current (a current flowing in a TFT when the TFT is in an OFF state).
For that reason, the catalytic element has to be quickly removed, or reduced to a degree that it does not exert any electric influence, once the crystallization step is finished. A technique that utilizes the gettering effect can be used to remove or reduce the catalytic element.
One of existing gettering methods includes the steps of partially covering, with a resist mask, a crystalline silicon film obtained by crystallizing an amorphous silicon film with the help of a metal element so as to cover a portion of the crystalline silicon film that is to serve as a channel forming region in a semiconductor layer of a TFT, and doping the rest of the semiconductor layer of the TFT with P or other Group 15 elements effective in gettering in high concentration to form a region that promotes gettering (the region is hereinafter called a gettering sink). Another example of the existing gettering methods involves similarly covering the region of the crystalline silicon film that serves as the channel forming region of the TFT with a resist mask and forming a gettering sink containing P or other Group 15 elements in high concentration in the periphery of a portion of the crystalline silicon film that forms the semiconductor layer of the TFT. However, these methods need the mask formation step, thereby resulting in increases in the number of masks and the number of manufacturing steps. Therefore, the methods have problems in productivity, yield, and manufacturing cost.
Further, when a p-channel TFT is formed, a region for forming the p-channel TFT is doped with a p-type impurity element (boron (B), in this example) to form a source region and a drain region after doped with a large amount of phosphorus for gettering. In order to invert the n-type conductivity of the region for forming the p-channel TFT, which has been given by phosphorus (P) through the previous doping, the region has to be doped with boron (B) in considerably high concentration.
This brings a problem of reduced throughput in the doping step, or a problem of difficulty in improving the crystallinity of the source region and the drain region by heat treatment.
The semiconductor layer has to be doped with phosphorus (P) in order to carry out the gettering treatment. However, doping with a p-type impurity element (typically, boron (B)) is also needed to form a p-channel TFT. Since the step of doping with an n-type impurity element (phosphorus (P)) precedes the step of doping the semiconductor layer of the p-channel TFT with boron (B), the layer has to be doped with the p-type impurity element in a concentration high enough to invert the n-type conductivity to the p-type conductivity (called counter doping or cross doping). The concentration of boron (B) in the layer has to be higher than the concentration of phosphorus (P) with which the layer has previously been doped. However, if the concentration of the impurity element is too high, the resistivity of the source drain region is raised to lower ON current. Counter doping is also unsatisfactory in terms of manufacture cost and productivity because it requires excessive ions as acceptors for doping.
The present invention has been made in view of the above, and an object of the present invention is therefore to provide a highly reliable electro-optical device and a method of manufacturing the electro-optical device by efficiently gettering a catalytic element used to promote crystallization of an amorphous silicon film.
One of the features of the presnet invention is an electric device comprising a semiconductor layer on an insulator, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film, wherein the electric device has an n-channel TFT and a p-channel TFT, wherein the semiconductor layer in the p-channel TFT includes a channel forming region (13), a region (11) containing an n-type impurity element and a p-type impurity element, and a region (12) containing only a p-type impurity element, and wherein a wiring line for electrically connecting the TFTs to one another is connected to the region (12) containing only a p-type impurity element in the p-channel TFT.
Another one of the features of the presnet invention is an electric device comprising a semiconductor layer on an insulator, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film, wherein the electric device has an n-channel TFT and a p-channel TFT, wherein the semiconductor layer in the p-channel TFT includes a channel forming region (13), a region (21a, 21b) containing an n-type impurity element and a p-type impurity element, and a region (22) containing only a p-type impurity element, wherein the region (22) containing only a p-type impurity element is sandwiched between the region (21a) containing an n-type impurity element and a p-type impurity element and the region (21b) containing an n-type impurity element and a p-type impurity element, and wherein a wiring line for electrically connecting the TFTs to one another is connected to the region (12) containing only a p-type impurity element in the p-channel TFT.
In the above electric device, wherein the gate electrode is a single layer or a laminate formed of elements selected from the group consisting of Ta, W, Ti, Mo, Al, and Cu, or of alloy materials or compound materials mainly containing these elements.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film on the gate insulating film and etching the conductive film to form a gate electrode of an n-channel TFT and to form in a p-channel TFT a conductive layer that is to serve as a gate electrode; doping the semiconductor layer with an n-type impurity element while using the gate electrode and the conductive layer as masks; and etching the conductive layer to form a gate electrode of the p-channel TFT while covering a region that is used for the n-channel TFT with a resist mask, and then doping the semiconductor layer in the p-channel TFT with a p-type impurity element.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film on the gate insulating film and etching the conductive film to form a gate electrode of an n-channel TFT and to form in a p-channel TFT a conductive layer that is to serve as a gate electrode; doping the semiconductor layer with an n-type impurity element while using the gate electrode and the conductive layer as masks; and etching the conductive layer to form a gate electrode of the p-channel TFT while covering a region that is used for the n-channel TFT with a resist mask, and then doping the semiconductor layer in the p-channel TFT with a p-type impurity element.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form first shape gate electrodes; doping the semiconductor layer with an n-type impurity element while using the first shape gate electrodes as masks; etching the first shape gate electrodes to form second shape gate electrodes narrower than the first shape gate electrodes; doping the semiconductor layer with an n-type impurity element while using as masks the second shape gate electrodes; etching the second shape gate electrodes to form third shape gate electrodes; etching the third shape gate electrodes to form fourth shape gate electrodes; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the fourth shape gate electrodes as masks.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the amorphous semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form first shape gate electrodes; doping the semiconductor layer with an n-type impurity element while using the first shape gate electrodes as masks; etching the first shape gate electrodes to form second shape gate electrodes narrower than the first shape gate electrodes; doping the semiconductor layer with an n-type impurity element while using as masks the second shape gate electrodes; etching the second shape gate electrodes to form third shape gate electrodes; etching the third shape gate electrodes to form fourth shape gate electrodes; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the fourth shape gate electrodes as masks.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A) and a gate electrode (C); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrode (A) and the gate electrode (C); etching the gate electrodes (A) and (C) to form a gate electrode (B) and a gate electrode (D); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrode (B) and the gate electrode (D); etching the gate electrode (D) of a p-channel TFT to form a gate electrode (E) while covering an n-channel TFT with a resist mask; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the amorphous semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A) and a gate electrode (C); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrode (A) and the gate electrode (C); etching the gate electrodes (A) and (C) to form a gate electrode (B) and a gate electrode (D); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrode (B) and the gate electrode (D); etching the gate electrode (D) of a p-channel TFT to form a gate electrode (E) while covering an n-channel TFT with a resist mask; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), and (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), and (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask; subjecting the insulator to heat treatment; covering the entire surface with an inorganic interlayer insulating film; forming an organic interlayer insulating film on the inorganic interlayer insulating film; forming a contact hole reaching the semiconductor layer through the inorganic interlayer insulating film and the organic interlayer insulating film; forming a pixel electrode on the organic interlayer insulating film; and forming a connection wiring line.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes; etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask; covering the entire surface with an inorganic interlayer insulating film; of gettering the catalytic element through heat treatment; forming an organic interlayer insulating film on the inorganic interlayer insulating film; forming a contact hole reaching the semiconductor layer through the inorganic interlayer insulating film and the organic interlayer insulating film; forming a pixel electrode on the organic interlayer insulating film; and forming a connection wiring line.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask; subjecting the insulator to heat treatment; covering the entire surface with an inorganic interlayer insulating film; forming an organic interlayer insulating film on the inorganic interlayer insulating film; forming a contact hole reaching the semiconductor layer through the inorganic interlayer insulating film and the organic interlayer insulating film; forming a pixel electrode on the organic interlayer insulating film; and forming a connection wiring line.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); doping the semiconductor layer in the p-channel TFT with a p-type impurity element while using the gate electrode (E) as a mask; covering the entire surface with an inorganic interlayer insulating film; gettering the catalytic element through heat treatment; forming an organic interlayer insulating film on the inorganic interlayer insulating film; forming a contact hole reaching the semiconductor layer through the inorganic interlayer insulating film and the organic interlayer insulating film; forming a pixel electrode on the organic interlayer insulating film; and forming a connection wiring line.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); removing the gate insulating film while using the gate electrode (B), the gate electrode (E), and the gate electrode (H) as masks; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while covering the n-channel TFT and the pixel TFT with a resist mask and using the gate electrode (E) as a mask.
One of the features of the presnet invention is a method of manufacturing an electrice device, comprising: forming an amorphous semiconductor layer on an insulator; doping the amorphous semiconductor layer with a catalytic element for promoting crystallization; heating the amorphous semiconductor layer doped with the catalytic element and then irradiating the semiconductor layer with a laser to obtain a crystalline semiconductor layer; forming a gate insulating film on the crystalline semiconductor layer; forming a conductive film (A) and a conductive film (B) on the gate insulating film; etching the conductive film (A) and the conductive film (B) to form a gate electrode (A), a gate electrode (C), and a gate electrode (F); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (A), (C), (F); etching the gate electrodes (A), (C), (F) to form a gate electrode (B), a gate electrode (D), and a gate electrode (G); doping the semiconductor layer with an n-type impurity element while using as masks the gate electrodes (B), (D), (G); etching the gate electrode (D) of a p-channel TFT and the gate electrode (G) of a pixel TFT to form a gate electrode (Dxe2x80x2) and a gate electrode (H), respectively, while covering with a resist mask an n-channel TFT that is formed in a driving circuit; etching the gate electrode (Dxe2x80x2) to form a gate electrode (E); removing the gate insulating film while using the gate electrode (B), the gate electrode (E), and the gate electrode (H) as masks; and doping the semiconductor layer in the p-channel TFT with a p-type impurity element while covering the n-channel TFT and the pixel TFT with a resist mask and using the gate electrode (E) as a mask.
In the above method, wherein the gate electrode (B), the gate electrode (E), and the gate electrode (H) are formed from the conductive film (A) and the conductive film (B), and the conductive film (A) is wider than the conductive film (B).
In the above method, wherein the laser used to irradiate the semiconductor layer that is doped with the catalytic element is a pulse oscillation type KrF excimer laser, XeCl excimer laser, YAG laser, or YVO4 laser.
A method of manufacturing an electro-optical device (semiconductor device) according to the present invention will be described. A conductive film (A) and a conductive film (B) are formed on a gate insulating film and patterned to form gate electrodes. In forming the gate electrodes, a gate electrode of an n-channel TFT is obtained by patterning the conductive films into a given shape. For a gate electrode (C) of a p-channel TFT, on the other hand, the conductive film (A) and the conductive film (B) are patterned in this etching step such that the gate electrode (C) is wider in the channel length direction than a gate electrode (B) of the n-channel TFT. This is for using later the gate electrode (C) as a mask in an n-type impurity element doping step so as to prevent a region doped with an n-type impurity element from getting too large in a semiconductor layer of the p-channel TFT. Using the gate electrode (C) as a mask, a region in the semiconductor layer that does not overlap the gate electrode (C) is doped with phosphorus (P). The region doped with phosphorus (P) functions as a gettering sink.
A gate electrode (D) of the p-channel TFT is next patterned into a given shape to form a gate electrode (E) having the given shape. Thereafter, the semiconductor layer of the p-channel TFT is doped with boron (B) to give the layer the p-type conductivity. Through the above steps, a channel forming region, a region doped with phosphorus (P) and boron (B), and a region doped with boron (B) alone are formed in the semiconductor layer of the p-channel TFT.
According to the present invention, the distance the catalytic element travels in the semiconductor layer of the p-channel TFT during gettering can be shortened. As a result, less catalytic elements segregate in crystal grain boundaries and therefore leak path of a small amount of current and an abrupt increase in OFF current due to the segregation take place less frequently. The characteristic and the reliability of the TFT are thus improved.